1. Field of the Invention
This invention relates to the formation of integrated circuit structures on semiconductor wafers. More particularly, this invention relates to a process and apparatus which results in deposition of material to the end edge of the wafer while providing for removal of deposition residues from the backside of the wafer.
2. Description of the Related Art
In the formation of integrated circuit structures on semiconductor wafers, it is important that materials not be deposited on the backside of the wafer, i.e., the rougher side of the wafer which is placed against the wafer support in a processing chamber. At least one reason for this is to avoid particle formation, which can occur if such materials deposited on the backside of the wafer later become dislodged, e.g., peel or flake off.
To avoid or inhibit such undesirable depositions on the backside of the wafer, various techniques and structures are sometimes employed such as, for example, a shadow ring which masks the peripheral portions of the top surface of the wafer to inhibit flow of the deposition gases and/or plasmas around the rounded or beveled end edge portion of the wafer to reach the back surface. Such a prior art structure is illustrated in FIG. 1, wherein a shadow ring 2, used to inhibit depositions on the end edge and backside of a wafer 10 on a wafer support 20 in a vacuum deposition chamber (not shown), also inhibits deposition over the entire front surface 12 of wafer 10.
While such techniques and structures are reasonably successful in inhibiting such backside depositions on the wafer, the penalty which must be paid is that integrated circuit structures constructed adjacent the end edge or periphery of the top surface of the wafer do not always receive the same deposition of materials as does the interior of the front surface of the wafer.
This interference with a complete deposition on the entire front surface of the wafer is also true when clamps are used to secure the wafer to a wafer support as shown in the prior art structure shown in FIG. 2, wherein clamps 22 secure wafer 10 to wafer support 20 in a vacuum deposition chamber (not shown) and thereby interfere with deposition on that portion of front surface 12 of wafer 10 lying beneath clamps 22.
In either instance, the failure to deposit material on the entire front surface of the wafer can result in a lowering of the yield of chips from a given diameter wafer. In other words, satisfactory integrated circuit structures cannot be formed in the area of the wafer immediately adjacent the end edge, so chips cut from such peripheral portions of the wafer will not have satisfactory integrated circuit structures formed thereon and must be discarded, thus lowering the overall yield of chips from the wafer.
Furthermore, simple geometries show that as the diameter of the wafer increases, more and more of the potential chips obtainable from a semiconductor wafer are located in the area of largest diameter of the wafer. As a result, the number of chips which may have to be discarded from a wafer due to insufficient processing adjacent the end edge of the wafer can become unacceptably high.
It would, therefore, be desirable to provide a process and apparatus wherein processing of the semiconductor wafer, such as a deposition process, can be carried out to the very edge of the front surface of a semiconductor wafer, i.e., even extending over the rounded or beveled edge of the wafer, while still inhibiting the generation of particles from undesirable backside depositions on the rear surface of the wafer.